Introduction

At first glance a DDR2 module looks like a since eh and ever known memory bolt. A little over 13 cm long and approximately 3 cm high. However, not only internally much has been done. The inconspicuous 240 contacts which connect the new ties with the motherboard make the start – at a second glance. Thus, the previous DDR socket – is seen purely from the mechanical side – died already for the new standard. In addition the significantly low voltage, which is needed to bring the new DDR2 devices up and running. 1.8 Volts are here “only” on paper. What’s with all these details, why DDR2 has come so late, what is behind the important activity of “Validation” and much more more, we want to clarify in this DDR2 basics.

The new standard

You get to a standard, the global market accepts, only with the collaboration of the biggest companies. In terms of memory, this is the JEDEC. The JEDEC (Joint Electron Device Engineering Council) consists currently of some 300 companies, which all belong to the chipset and memory maker family. A number of examples from the past show that these companies were not always very green and are. Still everything in regulated railways, ran at the presentation of DDR333 it was clearly more difficult from this time. It had initially assumed that after DDR333 as official standard probably equal to DDR2 would be, as it had one of our news of March 2002 on the subject, the whole went then but not so fast from States, as it had hoped that some members of the JEDEC. Pioneer was Intel once more in negative ways. The chip giant resisted the introduction of DDR400 memory and wanted to bring DDR2 much earlier to the market, which shows a view of the already mentioned message according to their wording was a launch of DDR2 for early 2003. Because the storage vendor however could keep pace with developing on paper in practice, the whole under these circumstances would have become exorbitantly expensive and ultimately – even though it may sound banal the modules not necessarily needed, one struck a ultimately yet another way by Intel with the introduction of “Canterwood” and “Springdale”. You pressed by suddenly the DDR400 standard with violence, you began to validate modules by companies that meet Intel’s requirements.

It was then finally end February 2003 and the first modules under official JEDEC DDR400 standard schwemmten on the market. The specifications for DDR400 quite clearly changed compared to the predecessors. For example, the slightly elevated voltage (2.5 V at DDR333, 2.6 V at DDR400) and the deactivated timings are here. The end of the first generation of DDR memory tips now but actually and irrevocably the end – and again, Intel is the initiator. While there are now already in memory, the DDR600 offers. Official standard is nevertheless no longer be about DDR400. The specifications for DDR2, however, already quite a while, more specifically since there 12 September 2003. We want to take a detailed look at on the next page.

Technical reasons

Soon torn in the introduction, and now still a bit detailed: Rein of the optics forth a layman detects differences hardly, whether it be a DDR1 – or DDR2 modules before him has. An small abnormality is the number of contacts – 240 at DDR2 compared to 184 in DDR modules. And there are also DDR2 modules with 200 (SO-DIMM), 214 (micro-DIMM) and 244 (mini registered DIMM) contacts. The memory chips, which so far only in exceptional cases in FBGA chips (fine-pitch ball grid array) have been made (and no longer put on the so-called TSOP (thin small outline package)), are now firmly anchored in the specifications of DDR2. The memory chips looks from outside significantly smaller – only WLSCP has even smaller proportions.

The changes in the new storage so stuck inside, in detail. To make this a little to understand going we however a little more. In the well-known SDR SDRAM, which is SDR for Single Data Rate, clock Chip core (it around 90% of the memory chip occupies), I/O-buffer(ein_indem_Speicher-Chip_integrierten_Zwischenspeicher,_rund_10%_Platzbedarf) and external memory bus with the same frequency. You imagine now a sine wave oscillation, data packets are transmitted only when a rising curve. Is thus a memory bandwidth of something over 1 GB / s – PC133 SDRAM was born (1 bit * 133 MHz * 64 bit (bandwidth) = 1064 MB / s). The introducing of DDR memory changed in principle only the following: in the famous sine data be transferred now both the rising and the falling curve – i.e. “double data rate”. Level playing field 2 instead of until now transfers per clock now 1 bit (2 bit * 133 MHz * 64 bit (bandwidth) = 2128 MB / s). This increased the effective data rate of the memory bus of 133 on 266 MHz and delivered as an approximate range of 2.1 GB / s – PC2100 as standard was born.

Now, the next evolution comes with DDR2. Everything remains internal but: 133 MHz (and thus a whole way behind the clock speed of DDR400 back). Added the I/O buffer with the double frequency of the chip core for DDR2 memory. To give the buffer memory ideally also twice as much data as possible, the interface between chip core and the I/O-buffer on four lines, is the so-called “prefetch of 4″, widened. In the DDR memory, this was double, simply connected to the SDRAM. Then follows in principle the same game as the DDR memory: because the I/O buffer with dual clock works and this is doubled again by double data rate, it offers a range of around 4.3 GB / s, which corresponds to exactly the official standard for the PC4300/DDR2-533 modules eventually. All in all has a four times as high maximum data transfer rate as a former SDR-module of SDRAM you now PC133 standard, although the chip still runs at 133 MHz.

Good German and the theory a little simplistic: To reach the same maximum channels of as previous DDR memory, DDR2 can be operated internally with the half frequency. The advantage of then also quite quickly becomes apparent. Because of the lower bar the module will be charged internally not so strong, which manage the installed chips with only 1.8 volts, which of course has a reduced heat production resulted. Because you internally but twice as wide connects at the new DDR2 memory compared to DDR-RAM, the theoretical maximum bandwidth remains the same. The timings are regarded the new store in comparison to the previous (still) as significantly worse and eat in such a way, due to the higher waste directly again a part of potential speed gain.

Timing and scheduling

Because the actual achieved range from latency depends in addition to the pure clock speed of the memory core. The latency specifies the number of bars here, needed to provide the data. Since the probability that the I/O buffer is powered by DDR2 modules access over all four pipelines, is lower than for DDR-RAM with two pipelines, the efficiency of DDR2 is reduced slightly. Same memory bandwidth, combined with the apparently relatively poor timing in theory to current DDR400 modules, and the percent will be initially probably the 5-10 slower DDR2 memory bars than a comparable product on the basis of DDR SDRAM. The manufacturer now but started to offer also modules with 3-3-3 in addition to modules with timings of 4-4-4. It is there but only for DDR2-400, DDR2-533, such ties are still absent. A document by Micron are very good information on the situation with the timings, in this sprawling form but is beyond the scope of article. So much by saying: typical latencies are between 12 and 20 ns. Due to these factors are currently no other timings as 3, 4 or 5 possible (see picture). If you got now nevertheless more interested in the timings and latencies, which should stop once lost circuits. There, Michael Schütte, SR. application engineer at OCZ, the probably most extensive, but also highly technical article on the subject has written. One remains by small demolition – as regards the timings – at the end of note: the supposed disadvantage of high latencies and apparently bad timing will dissolve with increasing frequency in air. And just that DDR2 has been developed.

A word on the new feature of the bus termination. DDR2 memory is a new way, to avoid interference, which forcibly cut the transfer rates of the module. On a DDR2 chip resistors for the termination of sitting directly on the storage engine, the so-called “on-die termination“. The memory controller now emits a signal on the bus, which causes all inactive DDR2 chips to switch to termination. Thus, only the active signal on the data line is located, interference is almost excluded. So far, so DDR memory, a grounded resistance that intercepts the interference of the I/o interfaces of the store is at the end of the bus on the motherboard. This cause interference on the storage engine, but, because every signal on its data bus from neighboring components is reflected. The more memory is now installed, the probability of a reflection is the greater. The new version also ensures that an active signal is trouble-free transfer, which consequently leads to a facilitate development and production of DDR2 modules.

Summarized once again the main features and benefits of DDR2 SDRAM:

• In 100 to 130 nm manufacturing process
• FBGA chips (fine-pitch ball grid array)
• It follows: around 50% smaller chips (126 mm² to previously 261 mm²)
• On die termination
• Module sizes from 128 MB to 4 GB
• Four variants: 200, 214, 240 and 244 pins
• Higher speeds (400-800 MHz)
• Higher bandwidth (sh) (= Table)
• CAS latency of 3, 4, 5
• low voltage (1.8 V)
• significantly lower power consumption (247 mW to date 527 mW)

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The manufacturer

On Intel’s validation list, we find currently many well-known names. Storage giants such as Elpida and Micron are there at the top, after Intel had ensured with triple-digit draws more or less that DDR2 finally takes up drive. But other companies are now represented. Front where of course Samsung and Hynix are, but also, Infineon and Nanya have memory chips to DDR2 standard in the program, that even Intel’s test. Not all manufacturers must go through Intel’s validation (but it would be beneficial, if one may so express which at this point). Validation by Intel is the intermediate step between prototype status with just a few patterns and the eventual mass production. Intel takes this all modules, both for notebooks, also for desktop PCs, server systems. The memory bar must pass different tests in Intel’s laboratories here. These were successful, the producers of finally land on the list of validated and thus recommended memory chips. This is of course only hurt a recommendation, not should an entry there but certainly.

All manufacturers who knows the customer so (from Kingston, TwinMOS, crucial to Corsair and OCZ), set to the registered therein chips. Kingston used, for example, the Elpida chips, but also Samsung chips can be found on their new modules. Currently, Corsair, crucial and TwinMOS set to Micron chips. Each manufacturer is here certainly only need a little trial run, before it was decided 100% for a vendor. And just as then even the clock Sprinterei begins. Companies like TwinMOS, Corsair and OCZ course not remain in the specifications of DDR2-400 or DDR2-533, but continue to develop the modules. So, for example, TwinMOS presents already DDR2-667 modules, OCZ is already at DDR2-800.

Intel and AMD

What do the two companies to which this matter with the new storage ultimately everything revolves. It is clear what will make Intel. The current FSB800 processors of type Northwood, Prescott and extreme Edition will support “Tumwater” and “Elmsford” on the server side, “Grantsdale” and “Alderwood” in the desktop PCs, DDR2 775 and the new chipsets with introduction of the new socket LGA. Therefore, they were also one of the pioneers who pushed “have through this new standard”. Accordingly, it looks also Intel’s future plans on DDR2. Complete support in the next generation of processors for the desktop PCs as well as for servers and workstations. To put these MHz on a FSB of 1066 MHz, later even to 1200, the new memory is more than demand. Just for the bandwidth that is possible, the new memory in dual channel mode ideal.

But what does AMD? Support will be DDR2 definitely, this much is clear. The everything is only decisive question: when? AMD DDR2 support in particular to the wide availability for the end customer, a worthwhile performance gain, and the price factor probably should not be underestimated for the upcoming DDR2 modules to make solid. Thus, the speculation that DDR2 until mid-2005 from AMD will be supported in the area, continues. This could be associated with the presentation of the new dual-core processors in mid-2005, what the overall package of new processors including good memory would more than complete. But these are so far only speculation.

Outlook and conclusion

What is left now at the end of the entire theoretical Batzens as a result? So much is certain: DDR2 is the logical further development of existing technologies. DDR2 undergoes all possible innovations to be the memory of the coming years. It looks at first perhaps still not DDR2 will create the breakthrough despite all the small obstacles. Certainly the case is that in 2004 no longer, also the manufacturer of the new modules have already understood this. Because DDR3, and thus we are still one step further ahead, is expected not before 2007, but is DDR2 duty and will meet them. The price will be initially however no great help. Prices of around $ 200 for a 512 MB-module can shrink the customer, because other components that belong to a DDR2 system, will be not just cheaper.

Can we now briefly to wander our gaze into the future. FBDIMM and DDR3. These are the watchwords of the next few years. While DDR3 is to assume the sceptre with the frequencies of 800, 1066 and 1333 MHz starting in 2007, FBDIMM (fully buffered DIMM) is in the year 2005 once on paper. New standards will ensure FBDIMM in search of ever-increasing data transfer rates, particularly in the field of the server. FBDIMM ensures an optimized data transfer with a new bus technology. A FBDIMM memory controller can manage, for example, up to 196 GB memory, which works with the quadruple speed compared to conventional DDR2. But this is only in a view to 2005 and beyond, because summary: it is in the future all continue to more bandwidth.